High-Speed SoC Interfaces test (Intermediate)

Sample questions

5 sample questions from the High-Speed SoC Interfaces test, with the answers. Samples are taken out of the live test, so you will not meet these when you sit it.

1. How is the clock recovered in a SerDes system?

   1. The clock is recovered using a fixed frequency oscillator in the receiver.
   2. The clock is embedded in the data stream as a separate signal.
   3. The clock is recovered using a phase-locked loop (PLL) that tracks the phase of the incoming data stream.
   4. The clock is derived directly from a reference clock in the receiver.

   Answer: C. The clock is recovered using a phase-locked loop (PLL) that tracks the phase of the incoming data stream.

   In SerDes (Serializer/Deserializer) systems, clock recovery is a critical process that allows the receiver to extract the clock signal from the data stream. This is typically done using a phase-locked loop (PLL), which tracks and aligns with the phase of the incoming data. The PLL adjusts its output clock to match the phase of the data, ensuring accurate sampling and synchronization. Other methods, such as using a fixed clock or relying on the data pattern, are not typically used because they are less reliable or cannot adapt to changes in the data stream.

2. Which of the following statements correctly describes a common mistake related to USB 3.0 SuperSpeed performance?

   1. USB 3.0 SuperSpeed uses 5 Gb/s per lane, but the payload rate is not affected by encoding overhead.
   2. USB 3.0 SuperSpeed uses 5 Gb/s per lane, and the payload rate equals the line rate.
   3. USB 3.0 SuperSpeed uses 5 Gb/s per lane, and the payload rate is higher than the line rate.
   4. USB 3.0 SuperSpeed uses 5 Gb/s per lane, but the actual payload rate is lower due to encoding overhead.

   Answer: D. USB 3.0 SuperSpeed uses 5 Gb/s per lane, but the actual payload rate is lower due to encoding overhead.

   USB 3.0 SuperSpeed has a line rate of 5 Gb/s per lane, but due to encoding overhead (such as 128b/130b encoding), the effective payload rate is lower. This is a common mistake, as people may confuse the line rate with the actual data transfer rate. The other options either misstate the encoding or incorrectly assume that the payload rate equals the line rate.

3. What is a key characteristic of the AXI4 data phase that differentiates it from an alternative such as AHB?

   1. AXI4 data phase is identical to the AHB data phase in terms of channel structure.
   2. AXI4 data phase uses a single channel for data, but supports out-of-order completion for both read and write operations.
   3. AXI4 data phase uses a single channel for both read and write data to reduce complexity.
   4. AXI4 data phase uses separate channels for write and read data, allowing parallelism and independent arbitration.

   Answer: D. AXI4 data phase uses separate channels for write and read data, allowing parallelism and independent arbitration.

   The AXI4 data phase uses separate channels (W for write data and R for read data) to allow parallelism and independent arbitration, which is a key distinction from alternatives like AHB, where data and address phases are interleaved. This design enables higher throughput and flexibility in handling read and write operations independently.

4. What behavior does the USB 2.0 host controller interface exhibit in terms of synchronization with the device?

   1. The device sends a SOF token every 1.0 ms to synchronize the host.
   2. The host controller sends a SOF (Start of Frame) token every 1.0 ms to synchronize the device.
   3. The SOF token is used for device enumeration in USB 2.0.
   4. The host controller polls the device every 1.0 ms using a periodic IN token.

   Answer: B. The host controller sends a SOF (Start of Frame) token every 1.0 ms to synchronize the device.

   In USB 2.0, the host controller sends a Start of Frame (SOF) token every 1.0 ms to synchronize the device and manage data transfers. This is a fundamental behavior of the USB 2.0 host controller interface. The other options are incorrect because: (1) USB 2.0 does not use a periodic polling interval of 1.0 ms for non-isochronous transfers; (2) the SOF token is sent by the host, not the device; (3) the SOF token is used for synchronization, not for device enumeration.

5. Which encoding method is used in the USB 2.0 physical layer for data transmission and clock recovery?

   1. PAM4 encoding with FLIT mode
   2. NRZI encoding with bit stuffing
   3. Manchester encoding with parity
   4. 8b/10b encoding with FEC

   Answer: B. NRZI encoding with bit stuffing

   USB 2.0 uses NRZI (Non-Return-to-Zero Inverted) encoding with bit stuffing to ensure sufficient transitions for clock recovery. This is a fundamental aspect of the USB 2.0 physical layer. The other options are incorrect because they are not used in USB 2.0 for data encoding or clock recovery.