Aman Chauhan
Final-year M.Tech Electronics Engineering (Communication and Signal Processing) student at Indian Institute of…
About
I am Aman Chauhan, currently pursuing my M.Tech in Electronics Engineering (Communication and Signal Processing) from the Indian Institute of Technology (ISM), Dhanbad, graduating in 2027. I have hands-on experience in designing and verifying digital circuits using Verilog HDL and SystemVerilog, with projects such as a UART Transceiver and a Parameterized Synchronous FIFO. My technical skills include RTL Design, Digital IC Design, Static Timing Analysis (STA), and Physical Design, including Floorplanning, Placement, CTS, and Routing. I am aiming to become a Software Engineer, leveraging my strong foundation in hardware design and my ongoing thesis work on robust link adaptation for URLLC in Beyond 5G networks.
Education
Indian Institute of Technology (ISM), Dhanbad
2025 – 2027M.Tech, Electronics Engineering (Communication and Signal Processing) · Grade: 8.93/10
G.B Pant Institute of Engineering and Technology, Pauri
2020 – 2024B.Tech, Electronics and Communication Engineering · Grade: 77.92
Jaycees Public School
2020 – 2020Senior Secondary (Class XII) · Grade: 90.6
Projects
RTL-to-GDSII Implementation of a 4-Bit Synchronous Counter
Verilog HDL, Xilinx Vivado, Yosys, OpenSTA, OpenROAD
Developing an end-to-end RTL-to-GDSII flow for a 4-bit synchronous counter, with RTL design and simulation in Vivado and the backend flow in open-source ASIC tools. Working on logic synthesis, static timing and power analysis, floorplanning, placement, CTS, and routing, targeting timing closure and a final GDSII layout.
Skills
Achievements
Merit Scholarship
2020-2024Merit Scholarship recipient during undergraduate studies.
Student Internship Representative (SIR)
2025-2026Student Internship Representative (SIR), CSP 2027 Batch, IIT Dhanbad.
Student Placement Representative (SPR)
2026-PresentStudent Placement Representative (SPR), CSP 2027 Batch, IIT Dhanbad.
IEEE Conference Paper Publication
2024Published a conference paper titled 'Face Shape Microstrip Antenna for UWB Applications' at IEEE Conference (DICCT 2024, Dehradun).
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